Qualcomm working on a new type of chip for Wear OS smartwatches

Summary

  • Qualcomm and Google are collaborating on a Snapdragon Wear RISC-V platform for Wear OS smartwatches, aiming to reduce time to market for OEMs and provide advanced features.
  • Google has been actively working to integrate RISC-V support into AOSP, but full integration is not yet achieved.
  • The collaboration between Qualcomm and Google in the RISC-V ecosystem raises uncertainties, especially with ARM’s evolving business model, as ARM is a major player in semiconductor design.


Open source has long been touted as a revolution in the tech industry. Enter RISC-V, an open source instruction set architecture that promotes innovation by allowing any entity to create custom cores. This encourages an influx of players into the market, spurring innovation and competition, and seemingly benefiting everyone from silicon suppliers to end consumers.

Such is the case of Qualcomm and Google, who recently made headlines by announcing their collaboration on a Snapdragon Wear RISC-V platform for Wear OS smartwatches. This partnership, in the broader context of chipset architecture developments and evolving business models, could herald a new era for wearable devices.

Google’s strong interest in RISC-V is not new. The company has made it a high-priority architecture for Android, placing it on a similar pedestal to ARMv8. As Mishaal Rahman points out, Google’s work to integrate RISC-V support into AOSP is ongoing, with current developments including the Cuttlefish virtual appliance and ART support. Although there is progress with the shell and command line tools, full integration has not yet been achieved.

Qualcomm’s alliance with Google is not a maiden voyage. As we covered previously, the search giant recently switched to a Snapdragon chip in its Pixel Watch 2, and many attribute this move to the new model’s improved battery life after the first-generation Pixel Watch used a Samsung Exynos SoC. .

This new company seeks to leverage its established camaraderie, with the goal of reducing time to market for OEMs. It promises advanced features such as custom cores, improved power efficiency, and improved performance for Wear OS. However, past collaborations do not necessarily guarantee future success. Since the integration of RISC-V architecture into the Wear OS ecosystem is relatively uncharted territory, there are a lot of uncertainties that could arise.

An intriguing backdrop for this collaboration is that SoftBank-owned ARM, a major player in semiconductor design, has just completed its IPO. As it prepares to do so, ARM intends to completely revamp the licensing scheme for its architecture, an issue that should not affect RISC-V thanks to its open source nature. Given ARM’s dominance, its revenue restructuring could significantly impact the dynamics of the tech world. Since Qualcomm is traditionally a licensee of ARM designs, it will be fascinating to see how its foray into the RISC-V ecosystem fits with ARM’s evolving business model.

While Qualcomm and Google’s collaboration on the RISC-V Wear OS platform promises a new horizon for wearable devices, it’s vital to be pragmatic. Between Google’s ongoing efforts to fully integrate RISC-V into AOSP, Qualcomm’s broader strategy, and ARM’s changing business dynamics, the result is confusing.

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